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dsPIC30F
FIGURE 9-2:
8-OUTPUT PWM MODULE BLOCK DIAGRAM
PWMCON1
PWM Enable and Mode SFRs
PWMCON2
DTCON1
DTCON2
FLTACON
FLTBCON
OVDCON
Dead-Time Control SFRs
Fault Pin Control SFRs
PWM Manual
Control SFR
PWM Generator #4
PDC4 Buffer
PDC4
Comparator
Channel 4 Dead-Time
Generator and
Override Logic
PWM4H
PWM4L
PTMR
Comparator
PTPER
PWM Generator
#3
PWM Generator
#2
Channel 3 Dead-Time
Generator and
Override Logic
Channel 2 Dead-Time
Generator and
Override Logic
Output
Driver
Block
PWM3H
PWM3L
PWM2H
PWM2L
PTPER Buffe r
PTCON
PWM Generator
#1
Channel 1 Dead-Time
Generator and
Override Logic
PWM1H
PWM1L
FLTA
FLTB
Comparator
SEVTCM P
SEVTDIR
PTDIR
Special Event
Postscaler
Special Event Trigger
PWM time base
Note:
Details of PWM Generator #1, #2 and #3 not shown for clarity.
? 2005 Microchip Technology Inc.
DS70043F-page 27
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